VLSI Signal Processing Course | IIT Kharagpur | Prof. Mrityunjoy Chakraborty
Course Details
| Exam Registration | 263 |
|---|---|
| Course Status | Ongoing |
| Course Type | Elective |
| Language | English |
| Duration | 8 weeks |
| Categories | Electrical, Electronics and Communications Engineering |
| Credit Points | 2 |
| Level | Undergraduate/Postgraduate |
| Start Date | 19 Jan 2026 |
| End Date | 13 Mar 2026 |
| Enrollment Ends | 02 Feb 2026 |
| Exam Registration Ends | 16 Feb 2026 |
| Exam Date | 29 Mar 2026 IST |
| NCrF Level | 4.5 — 8.0 |
Master the Art of VLSI Signal Processing with IIT Kharagpur
In the era of high-speed multimedia, 5G communications, and IoT, the demand for efficient, high-performance, and low-power digital signal processing (DSP) systems has never been greater. VLSI Signal Processing sits at the heart of this technological revolution, bridging the gap between complex algorithms and their silicon implementation. This detailed 8-week course, offered by the prestigious Indian Institute of Technology Kharagpur, provides a deep dive into the architectural techniques that make modern DSP possible.
About the Course Instructor: Prof. Mrityunjoy Chakraborty
The course is led by Prof. Mrityunjoy Chakraborty, a distinguished authority in the field. A professor in the Department of Electronics and Electrical Communication Engineering at IIT Kharagpur since 1994, Prof. Chakraborty brings decades of research and teaching excellence.
Academic & Research Credentials:
- Education: B.E. from Jadavpur University, M.Tech from IIT Kanpur, and Ph.D. from IIT Delhi.
- Research Interests: Digital & Adaptive Signal Processing, VLSI Signal Processing, Linear Algebra, and Compressive Sensing.
- Leadership: Senior Editorial Board Member for IEEE Signal Processing Magazine and IEEE Journal of Emerging Techniques in Circuits and Systems. Former Associate Editor for IEEE Transactions on Circuits and Systems.
- Recognition: Fellow of the National Academy of Sciences, India (NASI) and the Indian National Academy of Engineering (INAE). Served as a Distinguished Lecturer for APSIPA.
- Professional Service: Co-founder of APSIPA, Chair of the DSP Technical Committee of the IEEE Circuits and Systems Society, and has held key roles in major international conferences like ISCAS.
Course Overview: Bridging Algorithm and Architecture
This course addresses a critical challenge: transforming DSP algorithms into hardware that meets stringent real-time, power, and area constraints. It moves beyond theory to focus on architectural optimization at multiple levels, providing practical design methodologies for VLSI systems.
Course Details:
- Duration: 8 Weeks
- Level: Undergraduate/Postgraduate
- Prerequisites: Basic knowledge of digital circuit design and elementary DSP operations.
- Intended Audience: Students and professionals in Electrical Engineering, Electronics & Communication Engineering, Instrumentation, IT, and Computer Science.
- Industry Support: Recognized by industry leaders like ST Microelectronics, Texas Instruments, and Ittiam Systems.
Detailed 8-Week Course Curriculum
The course is meticulously structured to build expertise from fundamental concepts to advanced optimization techniques.
| Week | Core Topics Covered |
|---|---|
| Week 1 | Graphical representations (SFG, DFG, DG), high-level transformations, critical path analysis. |
| Week 2 | Retiming of Data Flow Graphs (DFG) for critical path minimization, iteration bound. |
| Week 3 | Cutset retiming and the design of pipelined DSP architectures with examples. |
| Week 4 | Parallel realization, the concept of unfolding, unfolding theorem, and loop unfolding. |
| Week 5 | Polyphase decomposition, hardware-efficient parallel realization of FIR filters (2 & 3-parallel). |
| Week 6 | Hardware minimization using folding techniques, folding formula, biquad filter examples. |
| Week 7 | Delay optimization via folding, lifetime analysis, forward-backward data allocation. |
| Week 8 | Pipelining digital filters, look-ahead techniques (clustered & scattered), combining pipelining with parallel processing. |
Who Should Enroll and Key Benefits
This course is uniquely valuable for multiple audiences:
- Students: Gain a competitive edge in VLSI and DSP design, crucial for careers in semiconductor and consumer electronics industries.
- Academia: Faculty members can use the structured content to develop or enhance similar courses at their institutions.
- Industry Professionals: Engineers in VLSI design, DSP, and communications can use it as a reference to solve practical design challenges involving throughput, power, and area.
The curriculum empowers participants to design high-speed, area-efficient, and low-power architectures—skills directly applicable to developing next-generation chips for mobile devices, network hardware, biomedical instruments, and more.
Recommended Textbooks
The course content is complemented by seminal texts in the field, primarily by Keshab K. Parhi:
- "VLSI Digital Signal Processing Systems" by Keshab K. Parhi (Wiley Eastern).
- "Digital Signal Processing for Multimedia Systems" by Keshab K. Parhi and Takao Nishitani (Marcel Dekker).
- "Pipelined Lattice and Wave Digital Recursive Filters" by J. G. Chung and Keshab K. Parhi (Kluwer).
Embark on this learning journey to master the critical engineering discipline of VLSI Signal Processing. Under the guidance of Prof. Chakraborty, you will acquire the knowledge to architect the efficient digital systems that power our world.
Enroll Now →