MOS Transistor Modeling Course | IIT Bhubaneswar | Prof. Navjeet Bagga
Course Details
| Exam Registration | 137 |
|---|---|
| Course Status | Ongoing |
| Course Type | Core |
| Language | English |
| Duration | 12 weeks |
| Categories | Electrical, Electronics and Communications Engineering |
| Credit Points | 3 |
| Level | Undergraduate/Postgraduate |
| Start Date | 19 Jan 2026 |
| End Date | 10 Apr 2026 |
| Enrollment Ends | 02 Feb 2026 |
| Exam Registration Ends | 20 Feb 2026 |
| Exam Date | 25 Apr 2026 IST |
| NCrF Level | 4.5 — 8.0 |
Master the Fundamentals and Future of Semiconductor Devices
In the rapidly evolving world of electronics, the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) remains the fundamental building block. Understanding its operation and accurate modeling is crucial for anyone aspiring to excel in VLSI design, semiconductor research, or advanced electronics development. We are excited to present a comprehensive 12-week course, "The MOS Transistor Modeling," designed to provide a deep, unified understanding of this critical component.
About the Course Instructor: Prof. Navjeet Bagga
This course is meticulously crafted and delivered by Prof. Navjeet Bagga, an esteemed academic and researcher in the field of semiconductor devices. Currently serving as an Assistant Professor in the School of Electrical and Computer Sciences at the Indian Institute of Technology (IIT) Bhubaneswar, Prof. Bagga brings a wealth of knowledge and practical experience.
His academic journey includes a Ph.D. from IIT Roorkee and post-doctoral research at the Karlsruhe Institute of Technology, Germany. With prior teaching experience at PDPM IIITDM Jabalpur, he has authored over 90 research papers. His expertise spans cutting-edge areas like:
- Nanoscale device modeling (Nanosheet FETs, FinFETs, Forksheet FETs)
- Negative Capacitance FETs and Tunnel FETs
- Ferroelectric FET-based memories
- Cryogenic CMOS devices and high-frequency modeling
- Device-circuit co-design and reliability analysis
An active collaborator with national and international peers, a Senior Member of IEEE, and a reviewer for top journals, Prof. Bagga ensures the course content is both foundational and at the forefront of current research.
Course Overview and Objectives
This course is designed to bridge the gap between device physics and practical modeling for circuit design. It offers a structured exploration from basic principles to the challenges of modern technology nodes.
- Unified Treatment: Provides a coherent understanding of MOSFET operation principles and demonstrates how these physical phenomena are translated into analytical models.
- For Device & Circuit Engineers: Aims to equip learners with the skills to extensively explore MOS transistors and emerging nanoscale devices from a modeling perspective.
- Address Modern Challenges: Dedicated modules on short-channel effects will help you understand the limitations of conventional MOSFETs and the rationale behind adopting state-of-the-art devices like FinFETs.
- Structured Learning Path: The course begins with the fundamentals of MOS operation, progressively moving to analytical models under various approximations to achieve simplified, usable models for design.
Who Should Enroll?
- Intended Audience: First-year Postgraduate (PG) students, Final-year Undergraduate (UG) students, and PhD scholars in Electrical, Electronics, and Communication Engineering.
- Prerequisites: A basic course in semiconductor physics, such as Electronic Devices and Circuits (EDC) or Solid State Electronics, is recommended.
- Industry Support: This course is highly relevant for professionals and is supported by all VLSI-related industries, particularly those with modeling and design groups.
Course Duration and Level
| Parameter | Details |
|---|---|
| Duration | 12 Weeks |
| Level | Undergraduate (Final Year) / Postgraduate |
| Category | Electrical, Electronics and Communications Engineering |
Recommended Books and Resources
To complement the lecture material, the course references authoritative texts and current research, including:
- Y. Tsividis, "The MOS Transistor," Oxford University Press.
- Taur and Ning, "Fundamentals of Modern VLSI Devices," Cambridge University Press.
- D.A. Neaman, "Semiconductor Physics and Devices," McGraw-Hill.
- C. M. Snowden, "Semiconductor Device Modelling," Springer.
- Research papers on emerging devices and modeling techniques.
Why Take This Course?
In an era defined by technological miniaturization and innovation, proficiency in device modeling is not just an academic exercise—it's a critical career skill. This course, led by an expert from IIT Bhubaneswar, offers you the unique opportunity to:
- Build a strong theoretical foundation in MOS transistor operation.
- Learn to develop and use analytical models for circuit simulation and design.
- Understand the driving forces behind the evolution from planar MOSFETs to advanced 3D transistors.
- Gain insights directly from an instructor actively contributing to research in next-generation semiconductor devices.
- Enhance your profile for roles in VLSI design, semiconductor research, and product development.
Embark on this 12-week journey to master the art and science of MOS Transistor Modeling. Equip yourself with the knowledge to understand, innovate, and design the electronic systems of tomorrow.
Enroll Now →